The International Supercomputing Conference is the Europe’s premier HPC event. The attendance allows observing trends science and technology of High Performance Computing for whole next year. 2009 edition achieved record numbers of attendees and exhibitors, a level of success even more impressive given the international economic crisis. With its move to Hamburg, ISC’09 reached a significantly higher level of attendance, bringing 1,670 HPC industry leaders. Research labs demonstrated their scientific applications of supercomputing in most recent fields such us GPGPU accelerators, clouds and green computing. Furthermore, this, ISC’09 also welcomed several first-time exhibitors. The exhibition brought countless highlights such as the demo of both the IS5000 40 Gb/s infniband switches and low-latency 10 Gigabit Ethernet. The attendance on ISC’09 allows to anticipate future development of ATLAS system and to present current achievements’ of ToK4nEDA team.
Continued device scaling into the nanometer region has given rise to new effects that previously had negligible impact but now present greater challenges to designing successful mixed-signal silicon. Design efforts are further exacebated by unprecedented computational resource requirements for accurate design simulation and verification. This paper presents a GPGPU accelerated sparse linear solver for fast simulation of on-chip coupled problems using nVIDIA and ATI GPGPU accelerators on a multi-core computational cluster and evaluate parallelization strategies from a computational perspective.